Synopsys Archives - High-Performance Computing News Analysis | insideHPC https://insidehpc.com/tag/synopsys/ At the Convergence of HPC, AI and Quantum Mon, 10 Jun 2024 15:08:23 +0000 en-US hourly 1 https://wordpress.org/?v=6.5.3 57143778 Synopsys Announces PCIe 7.0 IP for HPC-AI Chip Design https://insidehpc.com/2024/06/synopsys-announces-pcie-7-0-ip-for-hpc-ai-chip-design/ https://insidehpc.com/2024/06/synopsys-announces-pcie-7-0-ip-for-hpc-ai-chip-design/#respond Mon, 10 Jun 2024 15:08:12 +0000 https://insidehpc.com/?p=94212

SUNNYVALE, Calif., June 10, 2024 — Synopsys (Nasdaq: SNPS) today announced what it said is the industry’s first PCIe 7.0 IP solution consisting of controller, IDE security module, PHY, and verification IP. The company said the offering will enable chip makers to address demanding bandwidth and latency requirements for transferring massive amounts of data for compute-intensive AI […]

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]]> https://insidehpc.com/2024/06/synopsys-announces-pcie-7-0-ip-for-hpc-ai-chip-design/feed/ 0 94212 Synopsys Says it Has First 1.6T Ethernet IP Solution for AI and Hyperscale Chips https://insidehpc.com/2024/02/synopsys-says-it-has-first-1-6t-ethernet-ip-solution-for-ai-and-hyperscale-chips/ Thu, 29 Feb 2024 20:57:54 +0000 https://insidehpc.com/?p=93566

SUNNYVALE, Calif., Feb. 29, 2023 – Synopsys, Inc. (Nasdaq: SNPS) today delivered what it said is a dramatic increase in bandwidth and throughput for data-intensive AI workloads with the industry’s first complete 1.6T Ethernet IP solution. Hyperscale data centers, a backbone in the era of pervasive intelligence, require high-bandwidth, low-latency chips and interfaces to process […]

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]]> 93566 Synopsys Work Flows Certified for Next-Generation Mobile and HPC Designs on TSMC N3E and N4P Processes https://insidehpc.com/2022/06/synopsys-work-flows-certified-for-next-generation-mobile-and-hpc-designs-on-tsmc-n3e-and-n4p-processes/ Mon, 13 Jun 2022 21:39:49 +0000 https://insidehpc.com/?p=89797 MOUNTAIN VIEW, Calif., June 13, 2022 — Aiming to help customers optimize performance, power and area (PPA) for next-generation system-on-chips (SoCs) used in mobile and high-performance computing applications, Synopsys, Inc. (Nasdaq: SNPS) today announced that TSMC has certified the Synopsys digital and custom design flows for its N3E and N4P process technologies. In addition, Synopsys’ leading Foundation IP […]

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]]> 89797 On the Front Lines of AI Automation: Life Sciences and Chip Design https://insidehpc.com/2021/09/on-the-front-lines-of-ai-automation-life-sciences-and-chip-design/ Thu, 09 Sep 2021 18:01:17 +0000 https://insidehpc.com/?p=88289

Given the right task, AI-driven machines can be empowered with supercharged IQs that make the smartest humans look dumb, or at least inefficient.  As we watch advances made in task automation, we see it burgeoning into fields previously (last week) thought unimaginable. Two recent reports underline the trend. In one, Carnegie Mellon University is teaming […]

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]]> 88289 NEC Selects Synopsys ZeBu Server 4 Emulation Environment for Supercomputer Verification https://insidehpc.com/2019/12/nec-selects-synopsys-zebu-server-4-emulation-environment-for-supercomputer-verification/ Fri, 20 Dec 2019 16:01:32 +0000 https://insidehpc.com/?p=81836

Today Synopsys announced that NEC has selected Synopsys' ZeBu Server 4 as its emulation solution for the verification of its SX-Aurora TSUBASA high-performance compute solution products. "Developing super computers requires running and analyzing many software applications on the new HPC architecture," said Akio Ikeda, deputy general manager, AI Platform Division at NEC Corporation. "ZeBu Server 4 enabled execution of our HPC host software without modifications and running billions of software cycles prior to tapeout. We selected ZeBu Server 4 because of its superior performance and very fast bring-up time."

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