A news story in the Korean news publication Pulse reported today that Samsung electronics has confirmed “a new order for 3-nanometer high performance server chips.”
The Pulse story stated that semiconductor designer ADTechnology Co., a Korea-based design solution partner of Samsung and member of the AADP (Arm Approved Design Partners) has contracted with “an overseas customer for a server-oriented semiconductor design project” based on Samsung’s 3nm process.
“The customer was not disclosed, but it is said to be a U.S.-based company involved in high-performance computing (HPC) chips,” the Pulse article stated.
Last June, Samsung announced it had begun initial production of its 3-nm process node applying Gate-All-Around (GAA) transistor architecture. The company said that compared to 5nm process, the first-generation 3nm process can reduce power consumption by up to 45 percent, improve performance by 23 percent and reduce area by 16 percent.
Meanwhile, Taiwan Semiconductor Manufacturing Co. said in July it will ship 3nm chips in the third and fourth quarters. “We are seeing robust demand for N3 and we expect a strong ramp of N3 in the second half of this year, supported by both HPC and smartphone applications,” said C. C. Wei, TSMC CEO at the company’s second quarter earnings call. “N3 is expected to continue to contribute mid-single-digit percentage of our total wafer revenue in 2023.”
Image: Samsung Foundry Business managers holding 3nm wafers; credit: Samsung Electronics
