Happy April Fool’s Day! It was as always an interesting week in the world of HPC-AI, this edition of HPC News Bytes includes commentary on: Microsoft and….
Achronix FPGAs Add Support for Bluespec’s RISC-V Chips
March 26, 2024, SANTA CLARA, Calif. & FRAMINGHAM, Mass.– FPGA technology company Achronix Semiconductor Corporation and Bluespec, Inc., a RISC-V tools and silicon IP company, today announced a family of Linux-capable RISC-V soft processors that are available for the Achronix Speedster7t FPGA family. Marking an industry first, Bluespec’s RISC-V processors now integrate into the Achronix 2D […]
SiFive Announces RISC-V Products for GenAI and ML
Santa Clara, Calif., Oct. 11, 2023 –- RISC-V computing company SiFive, Inc. today announced two products designed to address new requirements for high performance compute. The SiFive Performance P870 and SiFive Intelligence X390 offer a new level of low power, compute density, and vector compute capability, and when combined provide the necessary performance boost for […]
@HPCpodcast: An Architecture Update from RISC-V International CTO Mark Himelstein
Mark Himelstein, chief technology officer at RISC-V International, joins us to discuss the latest developments with the RISC-V instruction set architecture and its growing community and footprint. Topics include: HPC use cases from sensors to supercomputer, achieving customization without loss of compatibility, AI and its impact on chips and systems, and the question on everyone’s mind: when will we see RISC-V in servers and supercomputers? Himelstein also looks at RISC-V’s design wins, including EuroHPC’s backing of R&D to develop HPC hardware and software based on RISC-V. You may also be interested in Shahin’s conversation with Mark in August 2020 to hear how things have evolved since then.
UK Startup VyperCore Says Its RISC-V Chip’s Memory Management Innovation Delivers 10X Performance Boost
A UK chip startup, VyperCore, says it has come up with a memory management scheme that does a software layer end-around and delivers as much as a 10x throughput improvement for high performance, general-purpose workloads without code modification. The company’s core insight, as described in a recent EE Times article: move “away from the processor’s […]
RISC-V Summit China 2022 Announces Agenda
Shanghai, August 12, 2022 – The RISC-V Summit China 2022 (Aug. 24-26) today announced its 2022 agenda, including keynotes, tutorials, and technical presentations in English language and Chinese language editions. This year’s summit includes more than 80 tech talks, showcases, and tutorials and will include presentations in both Chinese and English. The RISC-V Summit brings together innovators, […]
RISC-V Announces First Specifications of 2022
Nuremberg, Germany – June 21, 2022 – RISC-V International, the open-design standards organization, announced its first four specification and extension approvals of 2022 – Efficient Trace for RISC-V (E-Trace), RISC-V Supervisor Binary Interface (SBI), RISC-V Unified Extensible Firmware Interface (UEFI) specifications, and the RISC-V Zmmul multiply-only extension. The news builds on momentum from 2021, in which 16 […]
SiFive and Intel Foundry Services Launch $1B Partnership for RISC-V Markets
SANTA CLARA, Calif., Feb. 7, 2022 — Intel today announced a $1 billion fund to support early-stage startups and established companies building disruptive technologies for the foundry ecosystem. A collaboration between Intel Capital and Intel Foundry Services (IFS), the fund will prioritize investments in capabilities that accelerate foundry customers’ time to market – spanning intellectual property (IP), software tools, […]