The twice-annual TOP500 list of the world’s most powerful supercomputers is not universally loved, arguments persist whether the LINPACK benchmark is an optimal way to assess HPC system performance. But few would argue it serves a valuable purpose: for those installing leadership-class supercomputers, the TOP500 poses a challenge and a looming deadline that “concentrates the mind wonderfully.”
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]]>Third-party performance benchmarks show CPUs with HBM2e memory now have sufficient memory bandwidth and computational capabilities to match GPU performance on many HPC and AI workloads. Recent Intel and third-party benchmarks now provide hard evidence that the upcoming Intel® Xeon® processors codenamed Sapphire Rapids with high bandwidth memory (fast, high bandwidth HBM2e memory) and Intel® Advanced Matrix Extensions can match the performance of GPUs for many AI and HPC workloads.
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]]>The rumors had begun to cirulate – October is near, that starts the fourth quarter, 2023 isn’t far behind, all of which means Intel is coming up against a hard deadline to deliver its delayed Aurora exascale-class supercomputer to Argonne National Laboratory by the end of the year. Is another delay in the offing?
Then, yesterday, Intel tweeted this out: “Server blades with Intel 4th Gen Xeon and Ponte Vecchio, which uses Intel’s most advanced IP and packaging technology, are now shipping to Argonne National Labs to power the Aurora supercomputer!” And the tweet was backed by comments to the same effect from CEO Pat Gelsinger
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]]>At Intel’s investor day event in San Francisco yesterday, the company unveiled a dual-track the roadmap for its Xeon data center chip through 2024 – one track emphasizing high performance (P-core Sapphire Rapids), the other energy efficiency (E-core Sierra Forest). Intel’s future generation architecture strategy will move from two optimized platforms into a single commonone. […]
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]]>Harried data center and HPC server market dominator Intel today unveiled what the company said is its biggest shifts in Intel architectures in a generation. The Architecture Day event included looks at the two chips that will power the delayed Aurora exascale supercomputer, to be installed at Argonne National Laboratory; those chips are: Sapphire Rapids, […]
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