TORONTO, March 5, 2024 — AI chip startup Taalas Inc., has announced it has exited stealth mode and raised $50 million over two rounds of funding led by Pierre Lamond and Quiet Capital. Taalas was founded by Tenstorrent founder Ljubisa Bajic, along with early Tenstorrent engineering leaders Drago Ignjatovic, and Lejla Bajic. The three have worked on AI processors, […]
Tenstorrent Founder and Engineers Say Taalas AI Chip Outperforms a Small GPU Data Center
Startup Partners with Princeton on DARPA In-Memory AI Chip
An AI startup co-founded by a Princeton University professor has won an $18.6 million DOD grant to develop an in-memory chip built to deliver faster, more efficient AI inference processing. AI technology company EnCharge AI has announced a partnership with Princeton University supported….
HPC News Bytes 20240226: Intel Foundry Bash, Nvidia Earnings and AI Inference, HPC in Space, ISC 2024
A happy Monday of Leap Year Week to you! We offer a rapid run-through of the latest in HPC-AI, including: Intel Foundry bash, Gelsinger talks up the “Systems Foundry Era,” Wall Street hangs on Nvidia earnings, AI Training vs Inference, Digitial In-Memory Computing for inference efficiency, HPC in space, ISC 2024.
In-Memory Computing Could Be an AI Inference Breakthrough
[CONTRIBUTED THOUGHT PIECE] In-memory computing promises to revolutionize AI inference. Given the rapid adoption of generative AI, it makes sense to pursue a new approach to reduce cost and power consumption by bringing compute in memory and improving performance.
Cadence and Intel Foundry Partner on EMIB Packaging for Heterogeneous Integration
Feb. 21, 2024 — EDA software company Cadence and Intel Foundry have collaborated to develop an integrated advanced packaging flow utilizing Embedded Multi-die Interconnect Bridge (EMIB) technology to address the complexity in heterogeneously integrated multi-chip(let) architectures, the companies announced. The collaboration enables Intel customers to leverage advanced packaging to accelerate the high-performance computing (HPC), AI […]
Arm Announces New Neoverse Compute Subsystems
Arm today announced two new Neoverse Compute Subsystems (CSS) built on new Neoverse IP for the purpose of “enabling the AI infrastructure on Arm,” according to the company. The Neoverse CSS V3, for the high-performance V-series portfolio, offers a 50 percent performance-per-socket improvement over CSS N2, and….
Ohio Supercomputer Center Announces ‘Cardinal’ HPC Cluster, Doubles AI Processing
The Ohio Supercomputer Center today announced “Cardinal,” an HPC cluster (test node is pictured here) that the center said doubles its AI processing capacity. The system is scheduled to be launched in the second half of this year. A collaboration including Intel, Dell Technologies, Nvidia….
HPC News Bytes 20240219: AI Safety and Governance, Running CUDA Apps on ROCm, DOE’s SLATE, New Advanced Chips
Happy President’s Day morning to everyone! Today’s HPC News Bytes races (6:22) around the HPC-AI landscape with comments on: developments in AI security and governance, running CUDA (NVIDIA) apps on ROCm (AMD), DOE’s Exascale Software Linear….
AI Governance Proposal: Control AI by Controlling Compute
To control compute – to squeeze or open the spigot of processing power – is to control AI. In doing so, AI can be steered toward beneficial results while avoiding, or punishing, bad ones. That’s the argument forwarded in a white paper from 15 research centers and universities in the U.S., Canada and the UK – and OpenAI….