Maker of the world’s largest microprocessors, Cerebras Systems, today unveiled what it said is the largest AI chip, the Wafer Scale Engine 2 (WSE-2) — successor to the first WSE introduced in 2019. The 7nm-based WSE-2 exceeds Cerebras’ previous world record with a chip that has 2.6 trillion transistors and 850,000 AI-optimized cores. By comparison, […]
[SPONSORED GUEST ARTICLE] Since the beginning of human existence, people have looked into the night sky and wondered how the universe began. Cosmologists using the UK’s Memory Intensive DiRAC HPC service at Durham ….
Today, every high-performance computing (HPC) workload running globally faces the same crippling issue: Congestion in the network.
Congestion can delay workload completion times for crucial scientific and enterprise workloads, making HPC systems unpredictable and leaving high-cost cluster resources waiting for delayed data to arrive. Despite various brute-force attempts to resolve the congestion issue, the problem has persisted. Until now.
In this paper, Matthew Williams, CTO at Rockport Networks, explains how recent innovations in networking technologies have led to a new network architecture that targets the root causes of HPC network congestion, specifically:
– Why today’s network architectures are not a sustainable approach to HPC workloads
– How HPC workload congestion and latency issues are directly tied to the network architecture
– Why a direct interconnect network architecture minimizes congestion and tail latency
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