BEAVERTON, Ore. – May 1, 2024 – PCI-SIG, the organization responsible for the widely adopted PCI Express (PCIe) standard, today announced the release of the CopprLink Internal and External Cable specifications. The CopprLink Cable specifications provide signaling at 32.0 and 64.0 GT/s and leverage well-established industry standard connector form factors maintained by SNIA. “The CopprLink Cable […]

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SUNNYVALE, Calif., Feb. 6, 2024 — Tenstorrent and Blue Cheetah Analog Design today announced that Tenstorrent has licensed Blue Cheetah’s die-to-die interconnect IP for its AI and RISC-V chiplet solutions.  By selecting Blue Cheetah, Tenstorrent aims to accelerate its own as well as its customers’ and partners’ development of chiplet-based AI and RISC-V solutions. “Blue […]

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SANTA CLARA, Calif. – Nov. 8, 2023 – Ayar Labs, a company developing silicon photonics for chip-to-chip connectivity, will showcase its in-package optical I/O solution integrated with Intel’s Agilex Field-Programmable Gate Array (FPGA) technology. In demonstrating 5x current industry bandwidth at 5x lower power and 20x lower latency, the optical FPGA – packaged in a common […]

The post Ayar Labs to Show 4 Tbps Optically-enabled Intel FPGA at SC23 appeared first on High-Performance Computing News Analysis | insideHPC.

[SPONSORED CONTENT]  “FLOPS are cheap, moving data is expensive.” In HPC circles this sentiment is heard often. There’s a growing sense that classical HPC systems and the advanced chips that power them are pushing up against their practical limits, that some foundational new technology is needed to build more balanced systems to achieve the next […]

The post Silicon Photonics and the Hunt for an HPC Bandwidth Bottleneck Breakthrough appeared first on High-Performance Computing News Analysis | insideHPC.

SANTA CLARA, Calif. – Nov. 10, 2022 – Ayar Labs, a developer of chip-to-chip optical connectivity, was awarded a $15 million multi-year prototype Other Transaction Agreement (OTA) in support of Project KANAGAWA (the Co-Packaged Analog-Drive High-Bandwidth Optical Input/Output Project). The OTA, a non-traditional government contracting method for fast tracking research and innovation, was issued by Naval Surface […]

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We’ve heard so much about the CXL interconnect – including the recent announcement of CXL v3.0 – and components that are CXL-ready, that it may come as a surprise that CXL v1.1 “hosts” are only just now shipping. It’s a technology that could play a central role in the ever-more heterogenous, more memory-intensive systems of the future. And now, after several years of experimentation and various interconnect consortia, CXL is emerging as the standard for advanced functionality for fabric technologies. Along with CXL we also discuss some of the details of the CHIPS and Science Act....

The post @HPCpodcast: CXL News, the CHIPS Act, Chips and Nm and Chip ‘Sprawl’ appeared first on High-Performance Computing News Analysis | insideHPC.

Those who gave up for dead Intel's Omni-Path fabric, which Intel began working on 2012 and stopped supporting seven years later, may want to re-think that. Cornelis Networks, the company breathing life into Omni-Path since 2020, has won an $18 million R&D contract from the U.S. National Nuclear Security Administration (NNSA). The award is part of DOE's Next-Generation High Performance Computing Network (NG-HPCN) project....

The post Post-Exascale Fabric: NNSA Awards Cornelis Networks $18M for High Performance Network R&D appeared first on High-Performance Computing News Analysis | insideHPC.

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