Special guest and last year's ISC program chair John Shalf joins Shahin and Doug in this episode of the @HPCpodcast, sponsored by Lenovo, to discuss the rise of specialized architectures to boost HPC performance in the post-Moore's Law era. It's a topic ....

The post @HPCpodcast: John Shalf on the ‘Attack of the Killer Chiplets’ and the Future of HPC appeared first on High-Performance Computing News Analysis | insideHPC.

[SPONSORED CONTENT]  Jay Boisseau, HPC & AI Technology Strategist at Dell Technologies and organizer of the Dell Technologies HPC Community meetings, is one of the big personalities of HPC, someone who brings energy and insight to any gathering he’s a part of. In this insideHPC interview conducted on behalf of Dell, we talk with Boisseau about his career path, including serving as director of the Texas Advanced Computing Center, about big shifts and future trends in HPC and about the phenomenon, where HPC and AI intersect, of data growth rates outpacing Moore’s Law. He also disc uses his strategy for infusing life into the HPC Community meetings in an era of “Zoom fatigue,” including drawing inspiration from The Art of Gathering by Priya Parker, who, as Boisseau points out, probably never dreamed of the Zoom era.

The post Dell Technologies Interview: Dell’s Jay Boisseau on Data Growth Outpacing Moore’s Law, the HPC-AI Divide-Convergence and Beating Zoom Fatigue appeared first on High-Performance Computing News Analysis | insideHPC.

In this sponsored post, Ehsan Totoni, CTO of Bodo.ai, discusses opportunities to integrate a parallelization approach – capable of scaling to 10k cores or more - into popular cloud-based Data Warehouses to help speed large-scale analytics and ELT computing. And, because the model can be engineered for various special-purpose hardware and accelerators, there are opportunities to apply this to GPUs and FPGAs for media processing and encoding as well.

The post An Approach to Democratizing HPC-Style Computing appeared first on High-Performance Computing News Analysis | insideHPC.

Today, IBM and Samsung Electronics jointly announced what they said is a breakthrough in semiconductor design utilizing a new transistor architecture that allows more transistors to be packed in an IC chip. The key: the transistors stand up rather than lie down, thus taking up less space and offering “a pathway to the continuation of […]

The post IBM and Samsung Unveil ‘Semiconductor Breakthrough That Defies Conventional Design’ appeared first on High-Performance Computing News Analysis | insideHPC.

In this interview, Mark Papermaster, CTO and EVP, Technology and Engineering from AMD describes the company’s presence in the HPC space along with new trends in the industry. At a higher level, Mark also offers his views of the semiconductor industry in general as well as areas of innovation that AMD plans to cultivate. The discussion then turns to the exascale era of computing.

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In this video, Mark Wade from Ayar Labs explains how the company's optical I/O solution will address the critical computing challenges of efficiency, density, and distance for next-gen system architectures. "Our patented approach uses industry standard cost-effective silicon processing techniques to develop high speed, high density, low power optical based interconnect “chiplets” and multi-wavelength lasers to replace traditional electrical based I/O."

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The Royal Society Publishing has recently released a special compendium of articles based on a recent scientific discussion meeting with HPC Industry thought leaders. "This issue contains contributions from those who develop and implement numerical algorithms and software libraries – numerical analysts, computer scientists, and high-performance computing researchers - with those who use them in some of today's most challenging applications."

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In this video from ATPESC 2019, Rob Schreiber from Cerebras Systems looks back at historical computing advancements, Moore's Law, and what happens next. "A recent report by OpenAI showed that, between 2012 and 2018, the compute used to train the largest models increased by 300,000X. In other words, AI computing is growing 25,000X faster than Moore’s law at its peak. To meet the growing computational requirements of AI, Cerebras has designed and manufactured the largest chip ever built."

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Jim Keller from Intel gave this talk at the EECS Colloquium. "While it is true that certain vectors like transistor performance and power are showing diminishing returns, other vectors like transistor architecture, microprocessor architecture, software and new materials are showing increasing returns. The combination of these will continue to make life interesting and challenging for hardware and software designers alike."

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In this special guest feature from Scientific Computing World, Robert Roe interviews John Shalf from LBNL on the development of digital computing in the post Moore’s law era. "In his keynote speech at the ISC conference in Frankfurt, Shalf described the lab-wide project at Berkeley and the DOE’s efforts to overcome these challenges through the development acceleration of the design of new computing technologies."

The post John Shalf from LBNL on Computing Challenges Beyond Moore’s Law appeared first on High-Performance Computing News Analysis | insideHPC.